1. Field of the Invention
This invention relates to an ultra high frequency multiplexer. More particularly, this invention relates to an ultra high frequency multiplexer having matched impedence at the input and output lines.
2. Description of the Prior Art
In the present state of the art, it is generally known that the highest frequency rate for transmitting data is in the range of 200 to 300 megabits per second using the highest data rate commercially available integrated circuits. Emitter Coupled Logic (ECL) integrated circuits do not change their data state fast enough beyond the very high frequency range (up to 300 megahertz) to be used in ultra high frequency data rate digital equipment. Thus, an ECL multiplexer on an IC chip would not be feasible for ultra high frequency transmission of data.
There are commercially available multiplexers that are made in the form of integrated circuits. However, these commercially available integrated circuits are limited below the range of ultra high frequency and the input and output to these integrated circuits is not matched to standard impedence input and output cable. Another problem which presents itself in ultra high frequency transmission of data, is that the length of the cables attached to the integrated circuits cause phase shift of the data signals which is unacceptable for ultra high frequency transmission of signals.
Heretofore, phase generators and multipliers were known. However, the logic gating and combining of pulses in such devices as phase generators and multipliers were limited to the fastest logic switching time of the family of integrated circuits employed for these devices.
There is a need for an ultra high frequency generator which can be employed to transmit data from one point to another at speeds higher than the logic switching time of commercially available ECL integrated circuit logic.